2025-10-08 –, Krakow/ Business Value & Enterprise Adoption
By using AES-XTS mode as a vehicle, this talk teaches SIMD/vectorization optimization practices, some of the principles used to make those optimizations, and why these optimizations work on modern hardware. It does this with code samples throughout, which bounce back-and-forth between the actual assembly found in the XTS implementation and a by-the-book implementation so the two can be compared. Finally, the talk finishes with a few optimizations that are not strictly vectorization-related, but are nonetheless fun and interesting,
This talk begins by explaining, in detail, the implementation of AES and then AES-XTS mode, highlighting the properties of the algorithms which make them amenable to same instruction multiple data (SIMD) optimizations. Next, a crash course on the concept of vectorization. The meat of the talk then carries these learnings into a connection of the two by showing the assembly used in the vectorized XTS implementation alongside a "normal" implementation in Haskell which follows the language of the standards to a T. From this, we learn a few of the principles used to generalize what is or is not vectorizable and how those highlighted properties from the first section tie directly to those principles. The talk finishes with a few bonus optimizations that are not strictly vectorization-related but still extend from those same properties and fun and interesting in their own right.
I’m a curious exister living in Portland, OR. I’m also a dad and a husband who programs computers for a living. My interests over the years have spanned from type theory to cryptography and from distributed consensus to embedded systems. These days I work on x86 optimizations for open source cryptography libraries.